1、目錄1、特點32、概述33、結構43.1、程序存儲器63.1.1、系統代碼存儲器73.1.2、應用代碼存儲器83.2、數據存儲器93.2.1、寄存器文件（R0到R7）103.2.2、特殊功能寄存器（SFR）104、指令集154.1.1 Flag Settings164.1.2 Addressing Modes174.1.3、指令系統概要224.1.4、指令集描述22ADD <dest>,<src>寄存器相加或常數與寄存器相加22ADDC <dest>,<src>24AND <dest>,<src>相與26CALL addr

2、調用子程序28CLR <dest>清除29CLRB <dest>.<bit>清除位29CPL <dest> 取反30CPLB <dest>.<bit>位取反31CPSE <src>, <dest>比較相等（寄存器、寄存器與常數）跳過32DEC <dest> 自減量（-1）35DSZ <src>自減量（-1）如果是0跳過36DSNZ <src>自減量（-1）如果不是0跳過38INC <dest>自加量（+1）39INTA <src>傳送立即數

3、至中斷標志寄存器40ISZ <src>自增量（+1）是0跳過40ISNZ <src>自增量（+1）不是0跳過42JMP addr無條件跳轉43MOV <dest>,<src>傳送寄存器的值，43MOV C, <src>.<bit>傳送位至“C”45MOV <dest>.<bit>, C傳送“C”至位46MOVC移動碼字節R5，R4組合14位代表字節的地址，地址內的值傳送于R047NOP 空指48OR <dest>,<src>相或48RET子程序返回49RETI中斷返回50RL

4、C <dest>連同標志一起左移一位51RRC <dest>連同標志一起右移一位52SBC <src>.<bit>此位是0跳轉53SBS <src>.<bit>此位是1跳轉55SET <dest>置寄存器為全“1”57SETB <dest>.<bit>置此位為“1”58SHL <dest>左移一位不帶標志影響“C”59SHRB R0, <src>.<bit>連同位的值右移入R060SNZ <src>寄存器非”0”跳轉61SUBC <d

5、est>,<src>,<dest>減<src>,值放入<DEST>為補清C63SWAP <dest>半字節交換64SYS調用系統函數65SZ <src>寄存器是0跳轉66TRAP軟件斷點67XCALL通過寄存器R5和R4內的地址進行調用子程序67XJMP通過寄存器R5和R4內的地址進行跳轉68XOR <dest>,<src>寄存器相異或681、特點·8位數據寬度的哈佛結構·單一時鐘周期·致力于控制和操作應用的強大指令集·多種尋址方式· Imme

6、diate 立即· Direct 直接· Indirect with optional pointer manipulation指針間接· Direct Bit 直接位· Direct Bit with indirect operand reference and optional pointer manipulation 間接操作數指針直接位· Indirect Bit with optional pointer increment 間接指針增加· Indexed addressing of code memory 代碼存儲器變址尋

7、址·讀-修改-寫操作·分支指令平衡執行時間2、概述The MRK II Family of products are powered by Philips 2nd generation low power 8-Bit MIRCO RISC KERNEL (MRK II). Products featuring the MRK II core include PCF7921 (KEECOR), PCF7941 (STARC2XL), PCF7952 (ACTIC-PRO), PCH7970 (P2SC) and other types currently under deve

8、lopment. Although the individual device specifications for the above products may differ, all MRK II powered products feature the same instruction set, allowing code re-use across the products. The MRK II architecture and instruction set are outlined in the following.MRK II系列產品由第二代Philips低功率8位MIRCO

9、RISC KERNEL提供動力（MRK II ）。產品特點是以MRK II為核心，包括PCF7921(KEECOR), PCF7941(STARC2XL), PCF7952 (ACTIC-PRO), PCH7970 (P2SC) 并且其它型號當前正在發展中。雖然上述產品的各自設備規格有所不同, 并且所有MRK II提供以同樣指令集為特點的產品能量, 允許代碼在產品中再次使用。下面有關于MRK II的構造和指令集概述。Nevertheless, consult the corresponding specification of the product targeted for your app

10、lication, in order to identify any variations or discrepancies applicable and observe the section ANOMALY AND APPLICATION NOTES of the corresponding product specification.然而,在使用中應考慮到對應產品的指標與說明書保持一致，目的是對應產品的說明書來辨認可適用的和觀察反常現象部分和使用說明的任何差異或差誤。3、結構The MRK II Family of products utilizes a Harvard architec

11、ture featuring an 8 bit ALU and 16 bit instruction width. Due to the two stage pipeline concept, instructions virtually execute in a single clock cycle, resulting in ultra low power consumption. The applicable instruction set is downward compatible to the MRK I Family of products, featuring a number

12、 of extended addressing modes and architectural enhancements. The MRK II block diagram is outlined in Figure 1.MRK II系列產品采用8位運算器為特色的哈佛結構和16位的指令寬度。由于兩階路線的思想，指令實際上在單一的時鐘周期執行，造成超低消耗電力。可運用的指令集是對MRK I系列產品向下兼容的，以一定數量擴展的尋址模式和結構改進為特色。在表1有MRK II結構圖的概述。The MRK II is capable of addressing up to 16K bytes of Pr

13、ogram Memory, which either is assembled by System Code Memory (firmware) or by Application Code Memory. Typical, the System Code Memory holds device or application related firmware routines as implemented by Philips, while the Application Code Memory holds the user defined application code.MRK II能夠滿

14、足16K字節程序存儲器的尋址，它通過系統代碼存儲器（固件）或者應用代碼積存器中的任意一個來組合。典型的是, 系統代碼存儲器保證設備或應用相關的固件程序依照Philips 執行, 應用程序代碼保持在用戶定義的應用代碼。 The MRK II is capable of addressing up to 256 byte of Data Memory, which is split into User RAM, the Register File, Status, Control and Special Function Register. The program Stack is placed

15、in the User RAM space and may be located at any suitable location.MRK II是有能力滿足256字節數據存儲器尋址, 它分為用戶RAM,寄存器文件、狀態、控制和特殊功能寄存器。程序堆棧放在用戶RAM 空間, 并且可以放到一個適當的地點。表1 MRK II結構圖The available Program Memory and Data Memory size depend on the target device used; please refer to the corresponding product specificati

16、on for details.The Interrupt Control architecture implemented, support up to seven single level prioritized interrupts, from which one serves as Non Mask able Interrupt (NMI).The MRK II clock is derived from a on-chip clock or an application specific source and support RUN and IDLE operation, as ind

17、icated in the corresponding target device specification.可利用的程序存儲器和數據存儲器容量取決于被使用的設備對象，細節部分參考對應的產品說明書。中斷控制部分的執行, 支持七個單一級別按優先順序的中斷, from which one serves as Non Mask able Interrupt (NMI).MRK II時鐘是從一個集成電路時鐘或者一個應用特殊源和支持RUN和IDLE操作而得到的，依照規定的對應的說明書指示。3.1、程序存儲器The Program Memory may become as large as 16K by

18、te, with each instruction occupying 16 bit, thus two byte. The Program Counter (PC) addresses the Program Memory instruction by instruction, which are always aligned at even addresses, as outline for the Application Code Memory in Figure 3.程序存儲器可以變得像16K 字節一樣大, 同時各指令占16 位, 甚至二個字節。程序計數器(PC)由指令尋址程序存儲器,

19、 它總被排列成連續的地址, 在表3有關于應用代碼存儲器的描述。The Program Memory features a shadow mechanism, either mapping the System Code Memory (firmware) or the Application Code Memory, into the address range. Thus instruction execution occurs either from System Code Memory or Application Code Memory. Typical, System Code Me

20、mory holds device or application related firmware routines as implemented by Philips, while the Application Code Memory holds the user defined application code. In case a System Call (SYS instruction) is executed, the System Code Memory is enabled and program execution commences from a dedicated mem

21、ory location. As soon as a Return from Interrupt instruction (RETI) is encountered, the System Code Memory is disabled, the Application Memory enabled again and program execution commences with the instruction following the System Call, see Figure 2.程序存儲器以shadow機制為特色,映射系統代碼寄存器(固件)或者應用代碼寄存器兩個中的任意一個,進

22、入地址范圍。因而指示執行發生來自系統代碼存儲器或應用代碼存儲器中的一種。典型的是, 當應用代碼存儲器保存用戶定義的應用代碼時，系統代碼存儲器依照Philips保存設備或應用相關的固件程序。如果系統調用(SYS 指示) 被執行, 系統代碼存儲器被激活并且程序執行開始于一個存儲單元。當遇到一個來自中斷指令(RETI)的返回, 系統代碼存儲器失去功能, 應用程序存儲器再次激活并且程序執行從系統調用的指令開始, 如圖2 。In detail, execution of a System Call (SYS instruction) can be considered as a software int

23、errupt, causing the device to save the current Program Counter as well as the Program Status Word (PSW) flags C, H, and OV on the Stack, thus will decrement the Stack Pointer by two. Execution of a System Call will inhibit any interrupt service and disabling the Non Maskable Interrupt (NMI) as long

24、as program execution from System Code Memory takes place. Moreover, while executing from System Code Memory, the device can access a number of peripherals not accessible from Application Code Memory directly, like EEPROM, e.g. Program control is returned to the Application Code Memory, as soon as a

25、RETI instruction is encountered, which will restore the Program Counter and Program Status Word (PSW) flags C, H and OV as stored on the Stack, as well as, will enable the interrupt control circuitry again. The Stack Pointer increments accordingly.更為詳細地, 系統調用(SYS 指令) 的執行可能被當作軟件中斷, 導致設備在堆棧中保存當前程序計數器的

26、程序狀態字(PSW) 的標志C, H, 和OV, 因而將使用2個堆棧指針。只要程序執行從系統代碼存儲器發生，系統調用的執行將禁止任一項中斷服務和非屏蔽中斷失去能力(NMI)。此外, 當執行來自系統代碼存儲器, 設備可能直接地訪問一定數量的外圍設備不容易影響應用代碼存儲器, 例如EEPROM, 即。程序控制返回到應用代碼存儲器, 當遇到RETI 指令, 他重新存放在程序計數器并且程序狀態字(PSW)標志C 、H 和OV 在堆棧, 又能使中斷控制電路。堆棧指針相應增加。 3.1.1、系統代碼存儲器Typical, the System Code Memory holds device or app

27、lication related firmware routines, like read/write routines for EEPROM access, etc. For a detailed description of the firmware routines provided by the System Code Memory and means of passing data back and forth, please refer to the corresponding target device specification.Since the System Code Me

28、mory is implemented by a shadow mechanism, it does not support read out, thus code view, by code placed in the Application Code Memory.典型的是, 系統代碼存儲器保存設備或應用相關的固件程序, 例如EEPROM讀/寫慣程序等。由系統代碼存儲器和通過數據反復操作提供了一個固件詳細描述程序, 參見對應的設備說明書。 因為系統代碼存儲器由shadow 機制實施, 它不支持把代碼讀出, 因而代碼被存放在應用代碼存儲器。3.1.2、應用代碼存儲器The Applicati

29、on Code Memory address space is organized as given in Figure 3.在表3中，關于應用代碼存儲地址空間的組織。The memory features address locations dedicated to interrupt handling and other reserved locations occupied by the corresponding target device, please consult the corresponding product specification.存儲地址的特定區域致力于中斷處理并

30、且其它后備區域由對應的目標設備占據, 請參考對應的產品說明書。After a device reset, the System Code Memory is invoked and a target device specific Boot Sequence executed (Cold Boot). After completion of the Boot Sequence the device invokes the Application Code Memory, passing control to the application code (Warm Boot). For a det

31、ails description of the Boot Sequence, please consult the corresponding target device specification.在設備重啟之后, 調用系統代碼存儲器并且執行目標設備的啟動序列 (冷起動) 。在啟動序列完成對應用代碼存儲器的調用后, 通過應用代碼(熱起動)進行控制。對于啟動序列的詳細描述, 請參考對應的目標設備說明書。3.2、數據存儲器The Data Memory may feature up to 256 byte and is split into the Register File (R0 to R7

32、), a reserved area for Status, and Control Register, Special Function Register (SFR) and User RAM (including call Stack), see Figure 4.數據存儲器可以達到256字節并且被分成寄存器文件(R0 到R7), 一個狀態位的后備區域, 和控制寄存器, 特殊功能記數器 (SFR) 并且用戶RAM (包括調用棧), 參看圖4。The MRK II Family instruction set support direct access to the first 128 by

33、te locations of the Data Memory, while indirect access is supported for any location.當間接存儲適合于任何一個位置時，MRK II系列指令集支持對數據存儲器的第一個128 字節隨機存取。The Data Memory space available and actual address locations depend on the target device; please consult the corresponding device specification.數據存儲量的可利用度和有效地址地點取決于目

34、標設備, 請參考對應的設備說明書。The peripherals of the RISC (timer, I/O, etc) are accessible via a Register File that is mapped into the Data address space. The RISC allows byte-oriented as well as bit wise access to both Data Memory and Register File. RISC的外圍設備(定時器、I/O, 等) 是容易受到通過的映射數據地址空間的記數器文檔的影響。RISC允許字節引導 并且有

35、權使用數據存儲器和記數器文檔。Eight general purpose registers (8 bit) are provided. Four of them may be used in the context of register indirect addressing. Two of these registers provide additional post-increment and pre-decrement addressing modes in order to support e.g. a software data stack.提供了八個通用寄存器(8 位)。其中四

36、個可被用于寄存器間接尋址。這些中的兩個寄存器提供額外的位置增加和減少尋址模式為了支持比如軟件數據堆。The ALU supports instructions for arithmetic, logical and Boolean data manipulation.ALU 支持指令為算術, 邏輯和布爾的數據操作。3.2.1、寄存器文件（R0到R7）The Register File comprises of eight 8 bit general purpose registers, R0 to R7. In addition, some Register serve indirect an

37、d/or index addressing functions as specified by the corresponding instruction see section 4.1.2.計數器文件包括八個8 位通用存儲器, R0 到R7 。另外, 一些寄存器服務于間接尋址并且/或者變址尋址功能通過指定的對應指令, 參考4.1.2 。 3.2.2、特殊功能寄存器（SFR）In order to enable access the peripherals like Timer/Counter, EEPROM, etc., as well as to control operation of

38、the interrupt system and to report status information, a set of Special Function Register, SFR, is provided.為了使外圍設備的存取定時器/計數器、EEPROM, 等, 以及對中斷系統的控制操作和對報告狀態信息, 提供一組特別功能寄存器, SFR。For a comprehensive overview of the SFR organization and their corresponding values after a device reset, please refer to th

39、e corresponding target device.在設備重啟之后，SFR對應的值, 參見對應的目標設備。3.2.2.1、程序狀態字（PSW）The Program Status Word (PSW) contains several status flags that reflect the current state of the ALU. The PSW resides in the data memory and contains the Carry, Half-carry (for BCD operations) and the Overflow flag (for sign

40、ed operations), see Table 1.程序狀態字(PSW) 包含許多反映ALU 當前的狀態位。PSW存在于數據存儲器并且包含進位, 半進位(為BCD 操作) 并且溢出標記(有符號操作), 參考表1 。 表1 程序狀態字, PSW1. 標記 X'的位不使用和為將來的使用保留。任一次讀操作產生一個未定義結果。The Carry flag, C, and Half-carry, H serve the function of a carry bit in arithmetic operations. The Carry flag receives a carry out f

41、rom bit 7 of arithmetic operations while the Half-carry does for bit 3 of ALU operations. The Carry flag also serves the function of an “Accumulator” bit for a number of Boolean operations.The Overflow Flag, OV serves the function of an overflow during signed arithmetic operations. The overflow flag

42、, OV is set if there is a carry-out of bit 6 but not out of bit 7, or a carry-out of bit 7 but not bit 6, otherwise OV is cleared.The flags are located in the MS Nibble; the LS Nibble (C, H and OV) may be used at any time to save and/or restore the actual flag status by a SWAP instruction.在算術運算中，進位標

43、志位C, 和半進位標志位H 服務于進位的函數。當半進位位對3位 ALU 操作有效，進位標志接受一個從7位算術運算的操作。進位標志為更多的布爾運算服務于"累加器"的函數。溢出標志, 在有符號的算術運算期間OV服務于一個溢出函數。溢出標志 OV 被設置 如果有一個6位的carry-out 但不超過7位, 或7位的carry-out但不是6位, 否則OV 被清除。標志位于MS Nibble ，LS Nibble (C ', H ' 和OV ') 通過一個交換指令在任何時候保存AND/OR恢復當前標志。 3.2.2.2、狀態指針（SP）The Data Me

44、mory is used as 16-bit Stack during subroutine calls and interrupts handling. The Stack may be located at any location inside the User RAM space, as determined by the Stack Pointer (SP). The Stack Pointer is part of the Special Function Register and organized as shown in Table 2.在子程序調用和中斷處理期間，數據存儲器被

45、作為16 位的堆棧使用。堆棧由堆棧指針(SP)確定位于用戶RAM 空間里任一個地點。堆棧指針是特殊功能寄存器和組織的一部分，參考表2 。表2堆棧指針，SP1. Bits marked X are not connected and reserved for future use. Any read operation yields an undefined result. For future compatibility any write operation should assign a 0.1.標記 X' 的位不使用并且為將來的使用預留。任一次讀操作產生一個未定義的結果。為了以后

46、的兼容性任何寫操作應該分配 0' 。 Since the stack is aligned to even addresses, bit 0 of SP is ignored.因為堆棧是一個連續的排列, SP的0位被忽略。Instructions/events which perform a “Push” on the Stack (CALL, XCALL, SYS, interrupt service) first decrement the stack pointer by 2 before storing the Program Counter and eventually Pr

47、ogram Status Word (PSW) flags, in case of an interrupt or SYS call, to the designated address in the Data Memory (“pre-decrement”).執行入棧(CALL, XCALL,SYS, 中斷服務)的指令在存儲程序計數器和程序狀態字（PSW）標志之前，首先使用2個堆棧指針。在中斷或SYS call的情況下, 選定的地址在數據存儲器中 ("pre-decrement ") 。Instructions which perform a “Pop” operatio

48、n (RET, RETI) will use the address which the Stack Pointer SP currently points to, and retrieve the Program Counter from that location in the Data Memory. The RETI instruction will additionally retrieve the saved PSW flags (C, H, and OV). The SP is incremented by 2 afterwards (“post-increment”).執行出棧

49、的指令使用狀態指針指向的地址，并且從數據存儲器的特定位置找回數字計數器。RETI指令重新找回保存的PSW標志（C, H, and OV）。然后SP加2（post-increment）。3.2.2.2.1、堆棧組織The stack is organized in 16 bit words, meaning that each stack entry occupies two bytes of User Memory. Each Stack entry (16 bit word) is aligned to even addresses, see Table 3.堆棧是16位的字, 意味著各個堆

50、棧條目占領二個字節的用戶存儲器。各個堆棧的指令(16位字) 是一個連續的排列, 參考表3 。Table 3 Organization of stack entry表三 堆棧指令組織Since bit 0 of the Program Counter (PC) is always zero it is not stored, leaving space for the PSW flags.因為程序計數器（PC）的0位總是零并且不被存放, 為PSW標志位留下空間。Size, location and initialization of the Stack are fully determined

51、by the application program, thus require initializing the stack pointer (SP) prior to stack use. Due to the “post-decrement” concept, the initial Stack Pointer value must yield the address of the “top most” Stack entry, plus 2. The Application Code is fully responsible to check for stack overflows.堆

52、棧的大小、地點和初始化由應用程序確定, 要求在使用堆棧之前初始化堆棧指針（SP）。由于“post-decrement”的概念，最初的堆棧指針必須產生“最頂端”堆棧指令的地址，加2。應用代碼檢查堆棧的溢出。Although no specific instructions are provided to manipulate the call Stack (e.g. Push/Pop), the MRK Family features auto-increment and auto-decrement addressing modes providing means to construct a

53、 separate data stack; if desired by the application.雖然特殊的指令不能提供調用堆棧(即Push/Pop), MRK系列是以自增和自減的尋址模式為特色，如果應用需要，提供建立一個獨立的數據堆棧的方法。3.2.2.3、連續位指針(SBIT 和SPTR)The MRK Family provides an indirect bit wise addressing mode with an optional auto-increment feature, see section 4.1.2.MRK系列用一個任意自增的特點提供一個間接尋址模式, 參考4

54、.1.2 。This addressing mode provides a mechanism to access the Data Memory in a linear bit-sequential order. It can be used to store and retrieve data that has been received from or shall be sent to a corresponding bit-sequential peripheral, like Port, Modulator, Demodulator, etc.這個尋址模式提供一個在線性的位序列狀態下

55、訪問數據存儲器的機制。它可能使用存放和接受或者將被送到對應的位連續外圍設備數據,像端口、調制器、解調器, 等。The bit-sequential access to the Data Memory is supported by the Special Function Registers SBIT and SPTR, as shown in Table 4 and Table 5.位序列有權使用通過特殊功能寄存器SBIT和SPTR支持的數據存儲器，參考表4和表5。和表5。1 Bits marked X are not connected and reserved for future us

56、e. Any read operation yields an undefined result. For future compatibility a write operation should assign a 0.1標記 X' 的位不使用并且為將來使用預留。任何一次讀操作產生一個未定義結果。為了將來的兼容性寫操作應該分配 0' 。The address pointer registers SPTR and SBIT assemble together an 11 bit wide bit address in the Data Memory. The SPTR regi

57、ster specifies the byte address, whereas the SBIT registers specifies the bit that shall be addressed within that byte.地址指示存儲器SPTR 和SBIT在數據存儲器中集合起一個11 位寬度的位地址。 SPTR存儲器指定字節地址, SBIT 記數器則指定將執行字節的位。The order in which the bits are addressed within the byte is determined by the MAP bit, also located in Sp

58、ecial Function Register SBIT, see Table 6.執行字節的位次序是通過MAP決定的, 并且位于特殊功能寄存器SBIT, 參考表6 。Additional to the standard addressing mode (denoted as dbp), the Indirect Bit Addressing mode features an optional post-increment of the addressed bit (dbp+). Each access of this type causes the bit address (SPTR, SBIT) to be incremented by one after the access.另外，對于標準尋址模式(表示作為dbp), 間接位尋址模式以任意地址位的post-increment為特色(dbp+) 。這個類型的每個訪問導致位地址(SPTR, SBIT) 在一個訪問之后增加。4、指令