1、1 / 29SPECIFICATIONFORAPPROVALTitle23.0” FHD TFT LCD*When you obtain standard approval, please use the above model name without suffixBUYERGeneralMODELSUPPLIERL&T Display Technology (Fujian) Limited.*MODELLM230WF5SUFFIXT2F2SIGNATUREDATE/Please return 1 copy for your confirmationWith your signature a

2、nd comments./R&D LCM Dept.L&T Display Technology (Fujian) Limited.APPROVED BYDATEREVIEWED BYH.J. CHO / Manager MEK.H. HWANG / Manager EEJ.D. Park / DirectorKent.Zhuang / Manager PM() Preliminary Specification( ) Final Specification2 / 29ContentsNoITEMPageCOVER1CONTENTS2RECORD OF REVISIONS31GENERAL D

3、ESCRIPTION42ABSOLUTE MAXIMUM RATINGS53ELECTRICAL SPECIFICATIONS61)ELECTRICAL CHARACTERISTICS62)INTERFACE CONNECTIONS83)LVDS characteristics114)SIGNAL TIMING SPECIFICATIONS145)SIGNAL TIMING WAVEFORMS156)COLOR INPUT DATA REFERNECE167)POWER SEQUENCE178)POWER DIP CONDITION184OPTICAL SPECIFICATIONS195MEC

4、HANICAL CHARACTERISTICS256INTERNATIONAL STANDARDS271)SAFETY272)EMC273)Environment277Precautions283 / 29Record of revisionsRevision NoDescriptionDatePageVer 0.1Ver 0.2Ver 0.3Preliminary SpecificationsUpdate LED specificationUpdate mechanical informationUpdate Max Vertical period total (11601220) Upda

5、te International Standards / SafetyMay.,20,2011Aug.,02,2011Sep.,19,2011-72514274 / 291. General descriptionGeneral features Outline Dimension529.7(527.8) (H) x 312.25(310.1) (V) x 12.9 (D) mm(Typ.) Active screen size 23 inches(58.42cm) diagonal Pixel Pitch 0.0883*RGB(H)mm x 0.265(V)mm Pixel Format 1

6、920 horiz. By 1080 vert. Pixels RGB stripes arrangement Color depth 16.7M colors Luminance, white 250 cd/m2 ( Center 1Point, typ) Power Consumption Weight TBD g (Typ.) Display operating mode Transmissive mode, Normally White Surface treatments Hard coating (3H), Glare treatment of the front polarize

7、r Interface LVDS 2Port Viewing Angle (CR10) R/L 170(Typ.), U/D 160(Typ.) Total 21.45 W(Typ.), (6.65 WVLCD , 14.8 WW/O Driver)FIG. 1 Block diagramLM230WF5-T2F2 is a Color Active Matrix Liquid Crystal Display with an integral Light Emitting Diode (LED) backlight system. The matrix employs a-Si Thin Fi

8、lm Transistor as the active element. It is a transmissive type display operating in the normally white mode. It has a 23.0 inch diagonally measured active display area with Full HD resolution (1080 vertical by 1920 horizontal pixel array) Each pixel is divided into Red, Green and Blue sub-pixels or

9、dots which are arranged in vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot, thus, presenting a palette of more than 16,7M colors with Advanced-FRC(Frame Rate Control). It has been designed to apply the interface method t

10、hat enables low power, high speed, low EMI. FPD Link or compatible must be used as a LVDS(Low Voltage Differential Signaling) chip. It is intended to support applications where thin thickness, wide viewing angle, low power are critical factors and graphic displays are important. In combination with

11、the vertical arrangement of the sub-pixels, the LM230WF5-T2F2 characteristics provide an excellent flat panel display for office automation products such as monitors. Color Gamut 72%(Typ.) CIE 1931CN1LVDSpair #1LVDSpair #2Power circuitblock+5VVLCD Source driver circuitTFT-LCD Panel(1920RGB1080 pixel

12、s)G1TimingcontrollerRGBBacklight assembly (Single LED Bar) FB 2chS1S1920G10805 / 2990%10203040506070800-2001020304050Dry Bulb Temperature Wet BulbTemperature StorageOperationHumidity (%)RH10%40%60%602. Absolute maximum ratingsThe following are maximum values which, if exceeded,may cause faulty opera

13、tion or damage to the unit.Note : 1. Temperature and relative humidity range are shown in the figure below. Wet bulb temperature should be 39 C Max, and no condensation of water.Table 1. Absolute maximum ratingsParameterSymbolValuesUnitsNotesMinMax Power Supply Input VoltageVLCD-0.3+6.0Vdc At 25 Ope

14、rating TemperatureTOP050C1 Storage TemperatureTST-2060C Operating Ambient HumidityHOP1090%RH Storage HumidityHST1090%RHFIG. 2 Temperature and relative humidity6 / 293. Electrical specifications3-1. Electrical characteristicsIt requires two power inputs. One is employed to power the LCD electronics a

15、nd to drive the TFT array and liquid crystal. The second input power for the LED/Backlight, is typically generated by an LED Driver. The LED Driver is an external unit to the LCDs.Table 2. Electrical characteristicsNote : 1. The specified current and power consumption are under the VLCD=5.0V, 25 2C,

16、fV=60Hz condition whereas mosaic pattern(8 x 6) is displayed and fV is the frame frequency. 2. The current of Black pattern is specified under the VLCD=5.0V, 25 2C,fV=60Hz condition. 3. Permissive power ripple should be measured under VCC=5.0V, 25C, fV (frame frequency)=75Hz condition and At that ti

17、me, we recommend the bandwidth configuration of oscilloscope is to be under 20MHz. 4. The duration of rush current is about 5ms and rising time of power Input is 500us 20%. 5. Its measured by digital power supply.ParameterSymbolValuesUnitNotesMinTypMaxMODULE :Power Supply Input VoltageVLCD4.55.05.5V

18、dcPermissive Power Input RippleVLCD-0.3V3Power Supply Input CurrentILCD-MOSAIC(60Hz)-13301730mA1,5ILCD-BLACK(60Hz)-15201980mA2,5ILCD-BLACK(75Hz)-2480mA5Power ConsumptionPLCD-6.658.65Watt1Inrush currentIRUSH-3.5A1, 4Mosaic Pattern(8 x 6)White : 255GrayBlack : 0Graypower consumption measurementFull Bl

19、ack Pattern power input rippleFIG.3 pattern for Electrical characteristics7 / 29Table 3. LED bar Electrical characteristicsParameterSymbolConditionValuesUnitNotesMin.Typ.Max.LED String CurrentIs-8590mA1, 2, 5LED String VoltageVs40.643.446.2V1, 5Power ConsumptionPBar-14.815.7Watt1, 2, 4LED Life TimeL

20、ED_LT30,000-Hrs3LED driver design guide : The design of the LED driver must have specifications for the LED in LCD Assembly. The performance of the LED in LCM, for example life time or brightness, is extremely influenced by the characteristics of the LED driver. So all the parameters of an LED drive

21、r should be carefully designed and output current should be Constant current control. Please control feedback current of each string individually to compensate the current variation among the strings of LEDs. When you design or order the LED driver, please make sure unwanted lighting caused by the m

22、ismatch of the LED and the LED driver (no lighting, flicker, etc) never occurs. When you confirm it, the LCD module should be operated in the same condition as installed in your instrument.1. The specified values are for a single LED bar.2. The specified current is defined as the input current for a

23、 single LED string with 100% duty cycle.3. The LED life time is defined as the time when brightness of LED packages become 50% or less than the initial value under the conditions at Ta = 25 2C and LED string current is typical value.4. The power consumption shown above does not include loss of exter

24、nal driver. The typical power consumption is calculated as PBar = Vs(Typ.) x Is(Typ.) x No. of strings. The maximum power consumption is calculated as PBar = Vs(Max.) x Is(Typ.) x No. of strings. 5. LED operating conditions are must not exceed Max. ratings.Notes) The LED Bar consists of 56 LED packa

25、ges, 4 strings (parallel) x 14 packages (serial)8 / 293-2. Interface connections Table 4. Module connector(CN1) pin configuration123456789101112131415161718192021222324252627282930Pin NoSymbolDescription RXO0- RXO0+ RXO1- RXO1+ RXO2- RXO2+ GND RXOC- RXOC+ RXO3- RXO3+ RXE0- RXE0+ GND RXE1- RXE1+ GND

26、RXE2- RXE2+ RXEC- RXEC+ RXE3- RXE3+ GND SCL SDAPWM_OUT VLCD VLCD VLCD Minus signal of 1st channel 0 (LVDS) Plus signal of 1st channel 0 (LVDS) Minus signal of 1st channel 1 (LVDS) Plus signal of 1st channel 1 (LVDS) Minus signal of 1st channel 2 (LVDS) Plus signal of 1st channel 2 (LVDS) Ground (AGP

27、) Minus signal of 1st clock channel (LVDS) Plus signal of 1st clock channel (LVDS) Minus signal of 1st channel 3 (LVDS) Plus signal of 1st channel 3 (LVDS) Minus signal of 2nd channel 0 (LVDS) Plus signal of 2nd channel 0 (LVDS) Ground Minus signal of 2nd channel 1 (LVDS) Plus signal of 2nd channel

28、1 (LVDS) Ground Minus signal of 2nd channel 2 (LVDS) Plus signal of 2nd channel 2 (LVDS) Minus signal of 2nd clock channel (LVDS) Plus signal of 2nd clock channel (LVDS) Minus signal of 2nd channel 3 (LVDS) Plus signal of 2nd channel 3 (LVDS) Ground SCL SDA Reference signal for inverter control Powe

29、r Supply (5.0V) Power Supply (5.0V) Power Supply (5.0V) LCD connector(CN1) : IS100-L30O-C23 (UJU) or Equivalent Mating connector : FI-X30H and FI-X30HL (JAE) or Equivalent9 / 29FIG. 4 Connector diagramNote: 1. NC : No Connection. 2. All GND(ground) pins should be connected together and to Vss which

30、should also be connected to the LCDs metal frame. 3. All VLCD (power input) pins should be connected together. 4. Input Level of LVDS signal is based on the IEA 664 Standard. 5. PWM_OUT is a reference signal for inverter control. This PWM signal is synchronized with vertical frequency. Its frequency

31、 is 3 times of vertical frequency, and its duty ratio is 50%. If the system dont use this pin, do not connect.#1#30#1#30CN1IS100-L30O-C23 (UJU)1st signal pairs2nd signal pairsPower(+5V)PWM_OUT10 / 29The LED interface connector is a model 10FH-SM1-GAN manufactured by JST.The mating connector is a FFC

32、/FPC specified in LED interface connector specification. The pin configuration for the connector is shown in the table below.Table 5. LED connector pin configurationPin No.SymbolDescriptionNotes1FB1Channel1 Current Feed Back2FB2Channel2 Current Feed Back3NCNo connection4NCNo connection5VLEDLED Power

33、 Supply6VLEDLED Power Supply7NCNo connection8NCNo connection9FB3Channel3 Current Feed Back10FB4Channel4 Current Feed BackFIG. 5 Backlight connector viewPCBLED110Rear view of LCM11 / 29DescriptionSymbolMinMaxUnitNotesLVDS Differential Voltage|VID|200600mV-LVDS Common mode VoltageVCM0.61.8V-LVDS Input

34、 Voltage RangeVIN0.32.1V-3-3-1. DC Specification3-3-2. AC Specification3-3. LVDS characteristicsDescriptionSymbolMinMaxUnitNotesLVDS Clock to Data Skew MargintSKEW 400+ 400ps85MHz Fclk 65MHztSKEW 600+ 600ps65MHz Fclk 25MHzLVDS Clock to Clock Skew Margin (Even to Odd)tSKEW_EO- 1/7+ 1/7Tclk-LVDS Datat

35、SKEWLVDS ClockTclktSKEW (Fclk= 1/Tclk) 1) 85MHz Fclk 65MHz : -400 +400 2) 65MHz Fclk 25MHz : -600 +600LVDS Even DataLVDS Odd ClockLVDS Even ClocktSKEW_EOTclkTclk12 / 293-3-3. LVDS Data formatOG0OR5OR4OR3OR2OR1OR0OB1OB0OG5OG4OG3OG2OG1DEVSYNCHSYNCOB5OB4OB3OB2XOB7OB6OG7OG6OR7OR6Current(Nth) CyclePrevio

36、us(N-1)th CycleNext(N+1)th CycleRCLK +RXinO0 +/-Tclk * 4/7Tclk * 3/7TclkTclk * 1/7MSBR7R6R5R4R3R2R1R0LSBEG0ER5ER4ER3ER2ER1ER0EB1EB0EG5EG4EG3EG2EG1DEVSYNCHSYNCEB5EB4EB3EB2XEB7EB6EG7EG6ER7ER6 * ODD = 1st Pixel EVEN = 2nd PixelRXinO1 +/-RXinO2 +/-RXinO3 +/-RXinE0 +/-RXinE1 +/-RXinE2 +/-RXinE3 +/-OR3OR2

37、OR1OR0OG4OG3OG2OG1OB5OB4OB3OB2OG7OG6OR7OR6ER3ER2ER1ER0EG4EG3EG2EG1EB5EB4EB3EB2EG7EG6ER7ER6OG0OR5OR4OB1OB0OG5DEVSYNCHSYNCXOB7OB6EG0ER5ER4EB1EB0EG5DEVSYNCHSYNCXEB7EB613 / 29Table 6. Required signal assignment for Flat Link(NS:DS90CF383) transmitterNotes : Refer to LVDS Transmitter Data Sheet for detai

38、l descriptions. Pin #Require SignalPin NamePin #Require SignalPin Name1Power Supply for TTL InputVCC29Ground pin for TTLGND2TTL Input (R7)D530TTL Input (DE)D263TTL Input (R5)D631TTL Level clock InputTX CLKIN4TTL Input (G0)D732Power Down InputPWR DWN5Ground pin for TTLGND33Ground pin for PLLPLL GND6T

39、TL Input (G1)D834Power Supply for PLLPLL VCC7TTL Input (G2)D935Ground pin for PLLPLL GND8TTL Input (G6)D1036Ground pin for LVDSLVDS GND9Power Supply for TTL InputVCC37Positive LVDS differential data output 3TxOUT310TTL Input (G7)D1138Negative LVDS differential data output 3TxOUT311TTL Input (G3)D123

40、9Positive LVDS differential clock outputTX CLKOUT12TTL Input (G4)D1340Negative LVDS differential clock outputTX CLKOUT13Ground pin for TTLGND41Positive LVDS differential data output 2TX OUT214TTL Input (G5)D1442Negative LVDS differential data output 2TX OUT215TTL Input (B0)D1543Ground pin for LVDSLV

41、DS GND16TTL Input (B6)D1644Power Supply for LVDSLVDS VCC17Power Supply for TTL InputVCC45Positive LVDS differential data output 1TX OUT146Negative LVDS differential data output 1TX OUT118TTL Input (B7)D1747Positive LVDS differential data output 0TX OUT048Negative LVDS differential data output 0TX OU

42、T019TTL Input (B1)D1820TTL Input (B2)D1949Ground pin for LVDSLVDS GND21Ground pin for TTL InputGND22TTL Input (B3)D2023TTL Input (B4)D2150TTL Input (R6)D2751TTL Input (R0)D024TTL Input (B5)D2225TTL Input (RSVD)D2352TTL Input (R1)D153Ground pin for TTLGND26Power Supply for TTL InputVCC54TTL Input (R2

43、)D255TTL Input (R3)D327TTL Input (HSYNC)D2456TTL Input (R4)D428TTL Input (VSYNC)D2514 / 293-4. Signal timing specificationsThis is the signal timing required at the input of the User connector. All of the interface signal timing should be satisfied with the following specifications for its proper op

44、eration.Table 7. Timing tableNote: 1. DE Only mode operation. The input of Hsync & Vsync signal does not have an effect on LCD normal operation. 2. The performance of the electro-optical characteristics may be influenced by variance of the vertical refresh rates. 3. Horizontal period should be even.

45、ParameterSymbolMin.Typ.Max.UnitNotesDCLKPeriodtCLK11.1113.8916.7nsPixel frequency: Typ.144MHzFrequencyfCLK607290.0MHzHorizontalHorizontal ValidtHV960960960tCLKH Period TotaltHP102410881120Hsync FrequencyfH646683kHzVerticalVertical ValidtVV108010801080tHPV Period TotaltVP109011001220For DCLK Vsync Fr

46、equencyfV506075HzDE(Data Enable)DE Setup TimetSI4-nsDE Hold TimetHI4-DataData Setup TimetSD4-nsFor DCLKData Hold TimetHD4-15 / 293-5. Signal timing waveformsDclktCLKValidInvalidInvalidDE(Data Enable)DatatSItHItSDtHDDE(Data Enable)tVVtVPDEDE(Data Enable)tHPtHVDE1. DCLK , DE, DATA waveforms 2. Horizon

47、tal waveform 3. Vertical waveform 16 / 29ColorInput Color DataRedMSB LSBGreenMSB LSBBlueMSB LSBR7R6R5R4R3R2R1R0G7G6G5G4G3G2G1G0B7B6B5B4B3B2B1B03-6. Color input data referenceThe brightness of each primary color (red,green and blue) is based on the 8bit gray scale data input for the color ; the highe

48、r the binary input, the brighter the color. The table below provides a reference for color versus data input.Table 8. Color data referenceBasicColorRedGreenBlueBlackRed (255)Green (255)Blue (255)CyanMagentaYellowWhite01000111010001110100011101000111010001110100011101000111010001110010101100101011001

49、0101100101011001010110010101100101011001010110001110100011101000111010001110100011101000111010001110100011101Red(000) DarkRed(001)Red(002)- - - - - - - - - - - - - - - - -Red(253)Red(254)Red(255) Bright000-111000-111000-111000-111000-111000-111001-011010-101000-000000-000000-000000-000000-000000-000

50、000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-111000-111000-111000-111000-111000-111001-011010-101000-000000-000000-000000-000000-000000-000000-000000-000Green(000) DarkGreen(001)Green(002)- - - - - - - - - - - - - -

51、 - - - -Green(253)Green(254)Green(255)BrightBlue(000) DarkBlue(001)Blue(002)- - - - - - - - - - - - - - - - -Blue(253)Blue(254)Blue(255) Bright000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-000000-111000-111000-111000-111000-111000-111001

52、-011010-10117 / 293-7. Power sequenceNotes : 1. Please avoid floating state of interface signal at invalid period. 2. When the interface signal is invalid, be sure to pull down the power supply for LCD VLCD to 0V. 3. LED B/L power must be turn on after power supply for LCD an interface signal are va

53、lid. 4. It must be no valid signal at SCL & SDA line for 500ms, after VLCD input to LCDTable 9. Power sequenceParameterValuesUnitsMinTypMaxT10.5-10msT20.01-50msT3500-msT4200-msT50.01-50msT71-sInterface Signal (Tx) Power for LED B/LVLCDPower Supply For LCD10%90%90%10%T1T2T5T7T3T4Valid dataLED B/L on0

54、VOFFOFF18 / 293-8. VLCD Power dip condition1) Dip condition 3.5V VLCD 4.5V , td20ms 2) VLCD 3.5V VLCD-dip conditions should also follow the Power On/Off conditions for supply voltage.4.5V3.5VVLCDtdFIG. 6 Power dip conditionGND(ground)19 / 294. Optical specificationOptical characteristics are determi

55、ned after the unit has been ON for 30 minutes in a dark environment at 25C. Table 10. Optical characteristicsTa=25 C, VLCD=5.0V, fV=60Hz, DCLK=72MHz, Is=85mAParameterSymbolValuesUnitsNotesMinTypMaxContrast RatioCR7001000-1(PR-880)Surface Luminance, whiteLWH200250-cd/m22(PR-880)Luminance Variation WH

56、ITE9P75-%3(PR-880)Response TimeRise TimeTrR-1.32.6 ms4(RD80S)Decay TimeTrD-3.77.4 msColor Coordinates CIE1931REDRxTyp-0.030.638Typ +0.03(PR-650)Ry0.331GREENGx0.310Gy0.624 BLUE Bx0.155By0.066WHITEWx0.313Wy0.329 Viewing Angle (CR5)6(PR-880) x axis, right(?=0)r7588Degree x axis, left (?=180)l7588 y axi

57、s, up (?=90)u7085 y axis, down (?=270)d7085 Viewing Angle (CR10) x axis, right(?=0)r7085Degree x axis, left (?=180)l7085 y axis, up (?=90)u6075 y axis, down (?=270)d7085 Crosstalk1.5%7(PR880) Luminance uniformity - Angular dependence (TCO03)LR-1.78(PR880) Color grayscale linearityuv0.01810(PR-650)20

58、 / 29H : 509.184 mmV : 286.416 mm H,V : Active AreaNotes : FIG. 8 Luminance measuring pointThe values specified are at an approximate distance 50cm from the LCD surface at a viewing angle of and equal to 0 .FIG. 7 presents additional information concerning the measurement equipment and method.FIG. 7

59、 Optical characteristic measurement equipment and method50cmOptical Stage(x,y)LCD ModulePritchard 880 or equivalent 1. Contrast ratio(CR) is defined mathematically as :It is measured at center point(1) Surface luminance with all white pixels Contrast ratio = Surface luminance with all black pixels 2

60、. Surface luminance is the luminance value at center 1 point(1) across the LCD surface 50cm from the surface with all pixels displaying white. For more information see FIG 8. 3. The variation in surface luminance , WHITE is defined as Minimum (P1,P2 .P9) WHITE = *100 Maximum (P1,P2 .P9) For more inf