1、- 本模塊的功能是驗證實現和PC機進行基本的串口通信的功能.需要在-PC機上安裝一個串口調試工具來驗證程序的功能.- 程序實現了一個收發一幀10個bit(即無奇偶校驗位)的串口控-制器,10個bit是1位起始位,8個數據位,1個結束-位.串口的波特律由程序中定義的div_par參數決定,更改該參數可以實-現相應的波特率.程序當前設定的div_par 的值是0 x104,對應的波特率是-9600.用一個8倍波特率的時鐘將發送或接受每一位bit的周期時間-劃分為8個時隙以使通信同步.-程序的工作過程是:串口處于全雙工工作狀態,按動key2,CPLD向PC發送皐elco米e-字符串(串口調試工具設成

2、按ASCII碼接受方式);PC可隨時向CPLD發送0-F的十六進制-數據,CPLD接受后顯示在7段數碼管上.library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY UART IS PORT ( clk : IN std_logic; rst : IN std_logic; rxd : IN std_logic; -串行數據接收端 txd : OUT std_logic; -串行數據發送端 en : OUT std_logic_vec

3、tor(7 downto 0); - 數碼管使能 seg_data : OUT std_logic_vector(7 DOWNTO 0); -數碼管數據 key_input : IN std_logic -按鍵輸入 ); END UART;ARCHITECTURE arch OF UART IS -/inner reg/ SIGNAL div_reg : std_logic_vector(15 DOWNTO 0);-分頻計數器,分頻值由波特率決定.分頻后得到頻率8倍波特率的時鐘 SIGNAL div8_tras_reg : std_logic_vector(2 DOWNTO 0);-該寄存器的

4、計數值對應發送時當前位于的時隙數 SIGNAL div8_rec_reg : std_logic_vector(2 DOWNTO 0); -寄存器的計數值對應接收時當前位于的時隙數 SIGNAL state_tras : std_logic_vector(3 DOWNTO 0); - 發送狀態寄存器 SIGNAL state_rec : std_logic_vector(3 DOWNTO 0); - 接受狀態寄存器 SIGNAL clkbaud_tras : std_logic; -以波特率為頻率的發送使能信號 SIGNAL clkbaud_rec : std_logic; -以波特率為頻率的

5、接受使能信號 SIGNAL clkbaud8x : std_logic; -以8倍波特率為頻率的時鐘,它的作用是將發送或接受一個bit的時鐘周期分為8個時隙 SIGNAL recstart : std_logic; - 開始發送標志 SIGNAL recstart_t米p : std_logic; -開始接受標志 SIGNAL trasstart : std_logic; SIGNAL rxd_reg1 : std_logic; -接收寄存器1 SIGNAL rxd_reg2 : std_logic; -接收寄存器2,因為接收數據為異步信號,故用兩級緩存 SIGNAL txd_reg : st

6、d_logic; -發送寄存器 SIGNAL rxd_buf : std_logic_vector(7 DOWNTO 0);-接受數據緩存 SIGNAL txd_buf : std_logic_vector(7 DOWNTO 0);-發送數據緩存 SIGNAL send_state : std_logic_vector(2 DOWNTO 0);-每次按鍵給PC發送Welco米e字符串,這是發送狀態寄存器 SIGNAL cnt_delay : std_logic_vector(19 DOWNTO 0);-延時去抖計數器 SIGNAL start_delaycnt : std_logic; -開始

7、延時計數標志 SIGNAL key_entry1 : std_logic; -確定有鍵按下曛? SIGNAL key_entry2 : std_logic; -確定有鍵按下標志 -/ CONSTANT div_par : std_logic_vector(15 DOWNTO 0) := 0000000100000100; -分頻參數,其值由對應的波特率計算而得,按此參數分頻的時鐘頻率是波倍特率的8倍,此處值對應9600的波特率,即分頻出的時鐘頻率是9600*8 SIGNAL txd_xhdl3 : std_logic; BEGIN en =01010101 ;-7段數碼管使能信號賦值 txd

8、= txd_xhdl3; txd_xhdl3 = txd_reg ; PROCESS(clk,rst) BEGIN IF (NOT rst = 1) THEN cnt_delay = 00000000000000000000; start_delaycnt = 0; ELSIF(clkEVENT AND clk=1)THEN IF (start_delaycnt = 1) THEN IF (cnt_delay /= 11000011010100000000) THEN cnt_delay = cnt_delay + 00000000000000000001; ELSE cnt_delay =

9、00000000000000000000; start_delaycnt = 0; END IF; ELSE IF (NOT key_input=1) AND (cnt_delay = 00000000000000000000) THEN start_delaycnt = 1; END IF; END IF; END IF; END PROCESS; PROCESS(clk,rst) BEGIN IF (NOT rst = 1) THEN key_entry1 = 0; ELSIF(clkEVENT AND clk=1)THEN IF (key_entry2 = 1) THEN key_ent

10、ry1 = 0; ELSE IF (cnt_delay = 11000011010100000000) THEN IF (NOT key_input = 1) THEN key_entry1 = 1; END IF; END IF; END IF; END IF; END PROCESS; PROCESS(clk,rst) BEGIN IF (NOT rst = 1) THEN div_reg = 0000000000000000; ELSIF(clkEVENT AND clk=1)THEN IF (div_reg = div_par - 0000000000000001) THEN div_

11、reg = 0000000000000000; ELSE div_reg = div_reg + 0000000000000001; END IF; END IF; END PROCESS; PROCESS(clk,rst) -分頻得到8倍波特率的時鐘 BEGIN IF (NOT rst = 1) THEN clkbaud8x = 0; ELSIF(clkEVENT AND clk=1)THEN IF (div_reg = div_par - 0000000000000001) THEN clkbaud8x = NOT clkbaud8x; END IF; END IF; END PROCES

12、S; PROCESS(clkbaud8x,rst) BEGIN IF (NOT rst = 1) THEN div8_rec_reg = 000; ELSE IF(clkbaud8xEVENT AND clkbaud8x = 1) THEN IF (recstart = 1) THEN -接收開始標志 div8_rec_reg = div8_rec_reg + 001;-接收開始后,時隙數在8倍波特率的時鐘下加1循環 END IF; END IF; END IF; END PROCESS; PROCESS(clkbaud8x,rst) BEGIN IF (NOT rst = 1) THEN d

13、iv8_tras_reg = 000; ELSE IF(clkbaud8xEVENT AND clkbaud8x = 1) THEN IF (trasstart = 1) THEN div8_tras_reg = div8_tras_reg + 001;-發送開始后,時隙數在8倍波特率的時鐘下加1循環 END IF; END IF; END IF; END PROCESS; PROCESS(div8_rec_reg) BEGIN IF (div8_rec_reg = 111) THEN clkbaud_rec = 1; -在第7個時隙,接收鼓芐藕龐行荽蛉? ELSE clkbaud_rec =

14、 0; END IF; END PROCESS; PROCESS(div8_tras_reg) BEGIN IF (div8_tras_reg = 111) THEN clkbaud_tras = 1; -在第7個時隙,發送使能信號有效,將數據發出 ELSE clkbaud_tras = 0; END IF; END PROCESS; PROCESS(clkbaud8x,rst) BEGIN IF (NOT rst = 1) THEN txd_reg = 1; trasstart = 0; txd_buf = 00000000; state_tras = 0000; send_state =

15、000; key_entry2 = 0; ELSE IF(clkbaud8xEVENT AND clkbaud8x = 1) THEN IF (NOT key_entry2 = 1) THEN IF (key_entry1 = 1) THEN key_entry2 = 1; txd_buf -發送起始位 IF (NOT trasstart=1) AND (send_state 111) ) THEN trasstart = 1; ELSE IF (send_state 111) THEN IF (clkbaud_tras = 1) THEN txd_reg = 0; state_tras =

16、state_tras + 0001; END IF; ELSE key_entry2 = 0; state_tras -發送第1位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第2位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第3位 IF (clkbaud_tr

17、as = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第4位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第5位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); st

18、ate_tras -發送第6位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第7位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNTO 0) = txd_buf(7 DOWNTO 1); state_tras -發送第8位 IF (clkbaud_tras = 1) THEN txd_reg = txd_buf(0); txd_buf(6 DOWNT

19、O 0) = txd_buf(7 DOWNTO 1); state_tras -發送停止位 IF (clkbaud_tras = 1) THEN txd_reg = 1; txd_buf = 01010101; state_tras IF (clkbaud_tras = 1) THEN state_tras = state_tras + 0001; send_state = send_state + 001; trasstart txd_buf txd_buf txd_buf txd_buf txd_buf txd_buf txd_buf IF (clkbaud_tras = 1) THEN

20、state_tras = state_tras + 0001; trasstart = 1; END IF; END CASE; END IF; END IF;END IF; END PROCESS; PROCESS(clkbaud8x,rst) -接受PC機的數據 BEGIN IF (NOT rst = 1) THEN rxd_reg1 = 0; rxd_reg2 = 0; rxd_buf = 00000000; state_rec = 0000; recstart = 0; recstart_t米p = 0; ELSE IF(clkbaud8xEVENT AND clkbaud8x = 1) THEN rxd_re