1、Basic StructureElectrical behaviorChapter 3 Digital circuitSwitch modelStatic modelDynamic model The models for CMOS device Switch modelAny node must get 1/0 from Vcc/Gnd by switchesSwitch is made by MOS device Switch model for MOS transistor Switch is controlled by G through electric field; Off: RD

2、-S is high; On: RD-S is low; PMOS: when G is 0, Switch on; when G is 1, Switch off;NMOS: when G is 1, Switch on; when G is 0, Switch off;Two types of MOS transistorCMOS inverter F: get 1 from PMOS, get 0 from NMOS; When X=1, NMOS is on; When X=0, PMOS is on;Why must be complement ? NAND gate / NOR g

3、ate NAND: NMOS serial , PMOS parallel; NOR: NMOS parallel, PMOS serial; NAND gate / NOR gate Each input control a PMOS and an NMOS; AND - series OR - parallelLogic is represented by NMOS connections ,PMOS is a duality connection. AOI / OAI Summery for basic CMOSEach input is connected both NMOS and

4、PMOS;The logic is expressed in N net , P net is its duality;The output is a negative logic ! Output of the positive logic Buffer AND gate Add an inverter to the inverse output ! CMOS transmission gate (TG)Three state output: 0 / 1 / ZWhen c=1, signal is passedWhen c=0, signal is cutoff Three state buffer Three state inverter Circuit made by three-state devices XOR gate MUX 2Open gate and wired logic Only N-net exist, Output: 0/Z ; Ge